Design of High Speed, variable baud UART on Papilio One 250k FPGA and interfaced FPGA with CC2500 Transceiver RF Module through MAX-3232 line driver to setup wireless communication. Driver programs are loaded within FPGA chip in .vhd format VHDL Programs to make FPGA as UART. Driver programs include RF Module Driver Block RFMDB Baud rate generator, UART Tx and UART Rx. IR Sensor Encoder/Driver Block IR sensor component 8-Bit Encoder. UART plays important role in serial communication. The number of the UART in a microprocessor is limited. Therefore a reusable Intellectual Property IP of UART is designed and realized on FPGA chip. The importance for System-on-Chip SOC using a reusable IP is increasing in modern design methodology. FPGA is used because it can reduce design time and cope with time-to-market and also provides a rapid prototyping by synthesizing the desired system with an appropriate Electronic Design Automation EDA tool.